february 2014 altera corporation ds-1046 datasheet ? 2014 altera corporation. all rights reserved. altera , arria, cyclone, enpirion, hardcopy, max, megacore, nios, quartus and stratix words and logos are trademarks of altera corporation and registered in the u.s. patent and trademark office and in other countries. al l other words and logos identified as tradem arks or service marks are the property o f their respective holders as described at www.altera.com/common/legal.html . altera warrants performance of its semiconductor products to current specifications in accord ance with altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. altera assumes no responsibility or liabilit y arising out of the application or use of any information, product, or service desc ribed herein except as expressly agreed to in writing by altera. altera customers a re advised to obtain the latest version of de vice specifications before relying on any published information and before placing or ders for products or services. 101 innovation drive san jose, ca 95134 www.altera.com subscribe iso 9001:2008 registered enpirion power datasheet ey1602 40v, low quiescent current, 50ma linear regulator the altera? enpirion? ey1602 is a wide input voltage range, low quiescent current linear regulator ideally suited for ?always-on? and ?keep alive? applications. the ey1602 operates from an input voltage of +6v to +40v under normal operat ing conditions, consuming only 18a of quiescent current at no load. the ey1602 has an adjustable output voltage range from 2.5 to 12v. it features an en pin that can be used to put the device into a low-quiesc ent current shutdown mode where it draws only 1.8a of supply current. the device features automatic thermal shutdown and current limit protection. the ey1602 is rated over the -40c to +125c temperature range and is avai lable in an 8 lead epsoic with exposed pad package.. features ?wide v in range of 6v to 40v ? adjustable output voltage from 2.5v to 12v ? guaranteed 50ma output current ? ultra low 18a typical quiescent current ? low 1.8a of typical shutdown current ? 1% accurate voltage reference ? low dropout voltage of 120mv at 50ma ? 40v tolerant logic level (ttl/cmos) enable input ? stable operation with 10f output capacitor ? 5kv esd hbm rated ? thermal shutdown and current limit protection applications ? fpga applications ?industrial ?networking ? telecom table 1. key differences in family of 40v ldo parts part number min. i out adj or fixed v out ey1602si-adj 50ma adj EY1603TI-ADJ 150ma adj figure 1. typical application figure 2. quiescent current vs load current (at unity gain), v in = 14v vin vout en vfb gnd c in 0.1f c out 10f r1 r2 pad (gnd) 0 10 20 30 40 50 60 70 -50 0 50 100 150 temperature (c) quiescent current (a) load = 50ma load = 0ma 09618 march 14, 2014 rev a
page 2 ey1602 40v, low quiescent current, 50ma linear regulator f ebruary 2014 alte ra corporation pin configuration ey1602si-adj (8 ld epsoic) top view ordering information part number part marking temp. range (c) enable pin output voltage (v) package (pb-free) pkg. dwg. # ey1602si-adj (notes 1) 1602as -40 to +125 yes adjustable 8 ld epsoic m8.15b evb-ey1602si-adj evaluation platform notes: 1. add ?-t*? suffix for tape and reel. 2. these altera enpirion pb-free plastic packaged products empl oy special pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is rohs compliant and compatible with both snpb and pb-free soldering operations). altera en pirion pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requ irements of ipc/jedec j std-020. pin descriptions pin number pin name description 1 vin input voltage pin. a minimum 0.1f x5r/x7r capacitor is required for proper operation. range: 6v to 40v 2, 3, 6 nc pins have internal termin ation and can be left not connected . connection to ground is optional. 4 en high on this pin enables the device. range: 0v to v in 5 gnd ground pin. 7 vfb this pin is connected to the extern al feedback resistor divider, which set s the ldo output voltage.range: 0v to 3v 8 vout regulated output voltage. a 10f x5r/x7r output capacitor is requir ed for stability. range: 0v to 12v - pad it is recommended to sold er the pad to the ground plane. vin nc nc en 1 2 3 4 8 7 6 5 vout vfb nc gnd pad (gnd) 09618 march 14, 2014 rev a
page 3 ey1602 40v, low quiescent curr ent, 50ma linear regulator february 2014 altera corporation absolute maximum ratings thermal information vin pin to gnd voltage . . . . . . . . . . . . . . .gnd - 0.3v to +45v vout pin to gnd voltage . . . . . . . . . . . . . .gnd - 0.3v to 16v en pin to gnd voltage . . . . . . . . . . . . . . . . gnd - 0.3v to vin vfb pin to gnd voltage . . . . . . . . . . . . . . . . . gnd - 0.3v to3v output short-circuit duration. . . . . . . . . . . . . . . . . . . .indefinite esd rating human body model (tested per jesd22-a114e). . . . . . . 5kv machine model (tested per jesd-a115-a) . . . . . . . . . . 200v charge device model (tested per jesd22-c101c) . . . 2.2kv latch up (tested per jesd78b; class ii, level a) . . . . . 100ma thermal resistance (typical) ? ja (c/w) ? jc (c/w) 8 ld epsoic package (notes 3, 4) 50 9 maximum junction temperature . . . . . . . . . . . . . . . . . . +150c maximum storage temperature range . . . . . -65c to +175c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? recommended operating conditions ambient temperature range . . . . . . . . . . . . . . -40c to +125c vin pin to gnd voltage . . . . . . . . . . . . . . . . . . . . .+6v to +40v vout pin to gnd voltage . . . . . . . . . . . . . . . . . .+2.5v to +12v en pin to gnd voltage . . . . . . . . . . . . . . . . . . . . . . . .0v to +40v caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 3. ? ja is measured in free air with the component mounted on a high effective thermal conductivity test board with ?direct attach? features. 4. for ? jc , the ?case temp? location is the center of the exposed metal pad on the package underside. electrical specifications recommended operatin g conditions, unless otherwise noted. v in = 14v, i out = 1ma, c in = 0.1f, c out =10f, t a = t j = -40c to +125c, unless otherwise no ted. typical specifications are at t a = +25c. boldface limits apply over the operating temperature range, -40c to +125c. parameter symbol test conditions min (note 7) typ max (note 7) unit input voltage range v in 64 0 v guaranteed output current i out v in = v out + vdo 50 ma vfb reference voltage v ref en = high, v in = 14v, i out = 0.1ma 1.211 1.223 1.235 v line regulation ? v out /? v in 3v ? v in ? 40v, i out = 1ma 0.04 0.115 % load regulation ? v out / ? i out v in = v out +v d, i out = 100a to 50ma 0.25 0.5 % dropout voltage (note 5) ? v do i out = 1ma, v out = 3.3v 10 38 mv i out = 50ma, v out = 3.3v 130 340 mv i out = 1ma, v out = 5v 10 48 mv i out = 50ma, v out = 5v 120 350 mv shutdown current i shdn en = low 1.8 3.64 a quiescent current iq en = high, i out = 0ma 18 24 a en = high, i out = 1ma 22 42 a en = high, i out = 10ma 34 60 a en = high, i out = 50ma 56 82 a power supply rejection ratio psr r f = 100hz; vin_ripple = 500mv p-p ; load = 50ma 58 db en function en threshold voltage v en_h v out = off to on 1.485 v v en_l v out = on to off 0.935 v en pin current i en v out = 0v 0.026 a en to regulation time (note 6) t en 1.65 1.93 ms protection features output current limit i limit v out = 0v 60 118 ma 09618 march 14, 2014 rev a
page 4 ey1602 40v, low quiescent current, 50ma linear regulator f ebruary 2014 alte ra corporation thermal shutdown t shdn junction temperature rising +165 c thermal shutdown hysteresis t hyst +20 c notes: 5. dropout voltage is defined as (v in - v out ) when v out is 2% below the value of v out when v in = v out + 3v. 6. enable to regulation is the time the output takes to reach 95% of its final value with v in = 14v and en is taken from v il to v ih in 5ns. the output voltage is set at 5v. 7. parameters with min and/or max limits are 100% tested at +25c, unless otherwis e specified. temperatur e limits established by characterization and are not production tested. electrical specifications recommended operatin g conditions, unless otherwise noted. v in = 14v, i out = 1ma, c in = 0.1f, c out =10f, t a = t j = -40c to +125c, unless otherwise no ted. typical specifications are at t a = +25c. boldface limits apply over the operating temperature range, -40c to +125c. (continued) parameter symbol test conditions min (note 7) typ max (note 7) unit 09618 march 14, 2014 rev a
page 5 ey1602 40v, low quiescent curr ent, 50ma linear regulator february 2014 altera corporation typical performance curves v in = 14v, i out = 1ma, v out = 5v, t j = +25 c unless otherwise specified. figure 3. quiescent current vs load current figure 4. quiescent current vs input voltage (no load) figure 5. shutdown current vs temperature (en = 0) figu re 6. output voltage vs te mperature (load = 50ma) 0 10 20 30 40 50 60 70 80 0 1020304050 load current (ma) quiescent current (a) -40c +25c +125c quiescent current (a) 0 5 10 15 20 25 30 010203040 input voltage (v) -40c +25c +125c 0 0.5 1.0 1.5 2.0 2.5 3.0 -50 0 50 100 150 temperature (c) v in = 40v v in = 14v shutdown current (a) -0.010 -0.005 0 0.005 0.010 -50 0 50 100 150 v out = 5v v out =3.3v temperature (c) % output voltage variation 09618 march 14, 2014 rev a
page 6 ey1602 40v, low quiescent current, 50ma linear regulator f ebruary 2014 alte ra corporation figure 7. output voltage vs load current figure 8. start-up waveform figure 9. power supply rejection ratio (load = 50ma) figure 10. load transient response typical performance curves v in = 14v, i out = 1ma, v out = 5v, t j = +25 c unless otherwise specified. (continued) 4.900 4.925 4.950 4.975 5.000 5.025 5.050 5.075 5.100 01020304050 load current (ma) -40c +25c +125c output voltage (v) en @ 500mv/div v out @ 1v/div time @ 500s/div 0 30 40 50 60 70 100 1k 10k 100k 1m frequency (hz) psrr (db) 20 10 v out = 5v v out = 3.3v 50ma 0ma v out @ 100mv/div time @ 5ms/div i out 09618 march 14, 2014 rev a
page 7 ey1602 40v, low quiescent curr ent, 50ma linear regulator february 2014 altera corporation block diagram reference + soft-start control logic thermal sensor + - ea vin en gnd vout fet driver with current limit vfb 09618 march 14, 2014 rev a
page 8 ey1602 40v, low quiescent current, 50ma linear regulator f ebruary 2014 alte ra corporation functional description functional overview the ey1602 is a high performance, high voltage, low-drop out regulator (ldo) with 50m a sourcing capability. the part is rated to operate over the -40c to +125c temperature range. featuring ultra-low quie scent current, it makes an ideal choice for ?always-on? a pplications. it works well under a ?load dump condition? where the input voltage could rise up to 40v. the device also features current limit and thermal shutdown protection. enable control the ey1602 features an enable pin. when it is pulled low, the ic goes into sh utdown mode. in this condition, the device draws less than 2a. driving the pin high turns the device on. for always on operation, the en pin can be tied directly to vin. current limit protection the ey1602 has internal current limit functionality to protec t the regulator during fault conditions. during current limit, the output sources a fixed amount of current largely independent of the outp ut voltage. if the short or overload is removed from vout, the output retu rns to normal voltage regulation mode. thermal fault protection in the event that the die temperature exceeds typically +165c, the output of the ldo will shut do wn until the die temperature cools down to typically +145c. the level of power dissipated, combined wi th the ambient temperature and the thermal impedance of the package, will determine if the junction temperature exceeds the thermal shutdown temperature. also see the sect ion on ?power dissipation?. application information input and output capacitors for the output, a ceramic capacitor (x5r or x7r) with a capacitance of 10f is recommended for the ey1602 to maintain stability. the ground connecti on of the output capacitor should be routed directly to the gnd pin of the device and also placed close to th e ic. a minimum of 0.1f (x5r or x7 r) is recommended at the input. 09618 march 14, 2014 rev a
page 9 ey1602 40v, low quiescent curr ent, 50ma linear regulator february 2014 altera corporation output voltage setting the output voltage is programmed using an exte rnal resistor divider, as shown in figure 11. the output voltage is calculated using equation 1: power dissipation the junction temperature must not exceed the range specif ied in ?recommended operat ing conditions? on page 3. the power dissipation can be calculated using equation 2: the maximum allowable junction temperature, t j(max) and the maximum expected ambient temperature, t a(max) will determine the maximum allowable junction temperature rise ( ? t j ), as shown in equation 3: to calculate the maximum ambient operating temperatur e, use the junction-to-ambi ent thermal resistance ( ? ja ), as shown in equation 4: board layout recommendations a good pcb layout is important to achieve expected perfor mance. consideration should be taken when placing the components and routing the trace to minimize the ground impedance, and keep the parasitic inductance low. the input and output capacitors shou ld have a good ground connection and be pl aced as close to the ic as possible. the vfb feedback trace should be away fr om other noisy traces. connect the expo sed pad to the ground plane for better heat dissipation. thermal vias on the pad increases heat dissipation. document revision history the table lists the revision history for this document. date version changes february 2014 1.0 initial release. vin vout en ey1602si-adj vfb gnd c in 0.1f c out 10f r1 r2 figure 11. setting output voltage v out 1.223v r1 r2 ------- - 1 + ?? ?? ? = (eq. 1) p d v in v out ? ?? i out v in i gnd ? + ? = (eq. 2) ? t j t jmax ?? t amax ?? ? = (eq. 3) t jmax ?? p dmax ?? x ? ja t a + = (eq. 4) 09618 march 14, 2014 rev a
page 10 ey1602 40v, low quiescent current, 50ma linear regulator f ebruary 2014 alte ra corporation small outline exposed pad plastic packages (epsoic) index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 o c h 0.25(0.010) b m m ? p1 123 p bottom view n top view side view m8.15b 8 lead narrow body small outline exposed pad plastic package symbol inches millimeters notes min max min max a 0.056 0.066 1.43 1.68 - a1 0.001 0.005 0.03 0.13 - b 0.0138 0.0192 0.35 0.49 9 c 0.0075 0.0098 0.19 0.25 - d 0.189 0.196 4.80 4.98 3 e 0.150 0.157 3.81 3.99 4 e 0.050 bsc 1.27 bsc - h 0.230 0.244 5.84 6.20 - h 0.010 0.016 0.25 0.41 5 l 0.016 0.035 0.41 0.89 6 n8 87 ? 0 8 0 8 - p - 0.094 - 2.387 11 p1 - 0.094 - 2.387 11 rev. 5 8/10 notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include interlead flash or protrusions. interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional . if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. controlling dimension: inch. c onverted millimeter dimensions are not necessarily exact. 11. dimensions ?p? and ?p1? are t hermal and/or electrical enhanced variations. values shown are maximum size of exposed pad within lead count and body size. 09618 march 14, 2014 rev a
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